Boeing Off Campus Drive 2021 | Freshers | Design & Verification Engineer | Bangalore

 

Boeing Off Campus Drive 2021 | Freshers | Design & Verification Engineer | 2017 – 2021 Batch | BE/ B.Tech/ ME/ M.Tech – CSE/ IT/ ECE; MCA/ M.Sc | Bangalore

Company Website: www.boeing.co.in

Positions: Entry-Level ASIC-FPGA Design & Verification Engineer

Experience: 0 – 3 Years

Salary: Best In Industry

Job Location: Bangalore

Eligibility Criteria for Boeing Off Campus Drive 2021:

• Bachelor, Master or Doctorate of Science degree from an accredited course of study, in engineering, computer science, mathematics, physics or chemistry
• Education/experience typically acquired through advanced education (e.g. Bachelor) and typically 0 to 3 years related work experience or an equivalent combination of education and experience (Masters)
• BE/ B.Tech/ ME/ M.Tech – CSE/ IT/ ECE; MCA/ M.Sc
• 2018/ 2019/ 20120/ 2021 Batch

Job Description:

Boeing India Engineering seeks an Entry-Level ASIC-FPGA Design and Verification Engineer to support multiple product lines in commercial and defense electronics development.

Job Responsibilities:

• Develop models in System Verilog to verify design implementation and develop and run scripts and Make-files.
• Analysis of customer and system requirements and development of architectural approaches and detailed specifications for various electronic products.
• Performs testing and analysis activity to assure compliance to requirements.
• Performs activities in support of functional verification, simulation, emulation, safety and other technical services/methodologies.
• Coordinates engineering support throughout the lifecycle of the product.
• Develop IP and Sub System modules for Test Bench integration under minimal guidance.

Primary Skills:

• Knowledge in writing Universal Verification Methodology (UVM) sequences and virtual sequences and its concepts like Inheritance, Polymorphism, etc.
• Knowledge in using Universal Verification Methodology (UVM): creating drivers, monitors, predictors, and scoreboards.
• Understanding upon working with self-checking simulation test bench from scratch for SoCs/ASIC/FPGA.
• Knowledge in verification working with internal/external VIPs, its development and evaluation.
• Understanding of System Verilog language and verification concepts.
• Knowledge upon using Linux or Unix terminal commands.
• Good to have exposure on using scripting languages: Make, Perl, Python, shell scripts, etc.
• Good Understanding upon designing digital ASIC/ FPGA architectural design documents (micro-architecture documents with timing diagrams, detailed design blocks, etc.).

Application Link : click here